Now days due to increasing transactions via wireless communication and internet, electronic data security is necessary for users so that sending data securely transmitted through the link. In Oct 2000 NIST adopted new AES Rijndael algorithm to replace data encryption standard (DES). Compared to software implementation, hardware implementation of Rijndael algorithm provides more physical security as well as higher speed to electronic data.The algorithm can be implemented in FPGA due to its flexibility and reconfiguration capability. A reconfigurable device is very convenient for an AES algorithm since it allows cheap and quick alterations. The paper presents hardware implementation of AES-256 bit on FPGA.
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